3D IC Stacking Technology, describes a technology that promises a revolution in SiP (system-in-package) formation—accelerating the performance of electronic systems in a “more than Moore” fashion. This innovative technology presents complexities as well as great opportunities to the electronic systems industry. This course aims at: (1) to equip students with fundamental knowledge and concepts on 3D IC stacking technology, and to enable the students to apply such knowledge in future careers in both industry and universities; (2) to enable students to understand the stacking of integrated circuits interconnected by through silicon vias (TSVs); and (3) to introduce students to promising and emerging applications of innovative process technologies and new design methodologies to fully exploit the capability of the 3D integrated circuit.

Continuous Assessment: 50%

Examination: 50%

Examination Duration: 2 hours